I am an Assistant Professor in the Department of Computer Science at William & Mary. I am the lead of the Scalable Architecture Lab. I received my Ph.D. degree from the Department of Electrical and Computer Engineering at Northeastern University in 2020. My research interests lie in GPU architecture, performance evaluation, and performance modeling.

Research Topics

Explainable Architecture
Explainable Architecture
Ever-increasing complex chip designs make them hard for humans to understand. If the designers cannot fully understand the architecture, the chip will inevitably contain hardware bugs, performance bottlenecks, reliability issues, and security vulnerabilities. Therefore, we need to develop data visualization tools that help designers make well-informed and evidence-based decisions.
Computer Architecture Simulation
Computer Architecture Simulation
A cycle-based simulator is an essential tool for computer architecture researchers to validate their ideas. The community requires the simulators to be easy to learn, highly flexible, highly performant, and highly accurate. I am honored to take the challenge and contribute to the community with the Akita simulator framework and the MGPUSim multi-GPU simulator.
Multi-GPU and Wafer-Scale System Design
Multi-GPU and Wafer-Scale System Design
Single GPU systems struggle to meet the performance requirement. Therefore, researchers start to use large-scale multi-GPU systems to achieve extreme performance. Inter-GPU communication can easily kill the performance. I design architecture and system solutions for multi-GPU systems to avoid inter-GPU traffic and improve performance.